Before going into the next part of answering questions and doubts about wire-wrap, we need to briefly address the issue of expansion buses and interfaces.
Newbies have an excessive tendency to run the processor's own buses off the board onto a backplane or to other boards that plug in.
The tendency to build things this way is partly from copying the industrial card cages of past decades, when clock speeds were slower and the fact that you couldn't get as much on a board meant you had to go out on the backplane to other boards for more resources. I took part in it myself, using STD bus (STD stands for "simple to design," not "standard"), and you can see one of the automated test equipment (ATE) setups I designed, built, and programmed at work. Here are three pictures; but see the link for more information.
Here it's all closed up. The wide ribbon cable goes to a test fixture box outside, which has one of our products connected by
a somewhat narrower ribbon cable, for testing:
The insides, shown with the front panel and cover removed:
It was a good solution in 1990, but I don't think I would use it again at this stage. For one thing, STD bus would be impractical to try to interface to today's faster 6502/816. Also, there's less need for that type of bus today than there was back then.
Take for example memory. At that time, if you wanted a megabyte of SRAM, battery-backed or not, it took a whole card. Now you can get more than that in a single IC socket on the CPU board, even in SRAM if you go with 3.3V. Back then, a disc-drive controller had to be on its own card also. Now, you can get far more storage in an SD card with the socket on the CPU board, or solder down a flash memory in a tiny SO-8 package.
The same goes for so many other things. It is no longer necessary to go offboard for much of anything anymore, which is nice because taking the processor's own buses off the board brings a huge performance penalty unless you're happy limiting yourself to a couple of MHz. (Sure, commercially made backplanes go far above that speed, but the design involves a lot of transmission-line theory which is not trivial. You can no longer just connect things and expect it all to work.)
What I advocate now after many more years of experience, as well as our now having a lot more SPI and I²C parts on the market (see this forum post for a concise comparison of popular synchronous-serial interface types), is not running the processor's own buses off the board at all—not even buffered—but instead have several interfaces on the CPU board, including something like our 65SIB (6502.org serial interface bus) which we devised on the forum, which extends SPI in several directions at once and makes it suitable for both internal and external equipment and peripherals, both intelligent and non-intelligent, and works for SPI, Microwire, and dumb shift register devices all simultaneously. Other interfaces on the CPU board might include LCD, printer, keyboard, I²C, Dallas' 1-Wire, etc..
I should add that in the ATE pictured above, only four of the boards were actually on the STD bus, and the STD backplane was only about five inches long. The other cards were controlled through a synchronous serial interface from a 6522 serial port giving hundreds of bits of I/O.
You might be surprised how much I/O and other features you can do with few parts if you plan it all right. One of the 6522 VIAs on my workbench computer is used for: (this list is repeated in the "I/O ICs" section, with the connection diagram)
That's all through a single 6522, simultaneously, and the only conflicts are that you can't press more than one key at a time while the LCD or printer are getting fed data or you'll mess it up, and you can't press a key during I²C operations.
If you do use the I²C though, you can make tiny modules with a minimum of only four pins: power, ground, clock, and data. On
the forum, we defined a 6-pin standard connector called I2C-6
for I²C modules, adding the IRQ (interrupt-request-not) line which will be needed for
I²C devices like a keyboard scanner IC which could interrupt when a key is pressed, or a real-time clock IC that would interrupt when
an alarm comes due. I have some serial EEPROM modules that are half the size of a postage stamp. One is pictured here:
That's a 4-pin socket on the right end, to fit onto a 2x2 header of .025" square posts. The shorting bar on the left is on a 1x2 pin header for write-protect. The LED tells when it's powered down so you can unplug it from the computer board, although this is just the first of many I made and after this first one I put LEDs on the computer to show the status of the I²C power and clock lines.
In this forum post in the topic "Standardizing an SPI
module pinout: SPI-10," we have finalized (as of Oct 31, 2016) a hobbyist-friendly connector and pinout for small SPI modules, called
"SPI-10." It is partially compatible with UEXT which also has
asynchronous serial and I²C and already has quite a few modules
available but lacks 5V support, interrupts, reset, an auxiliary line, and keying for keeping non-IDC connectors from getting plugged
in backwards—all needs which are met by SPI-10. The middle row in this picture shows 4MB SPI-10 modules:
Making your project as modular as possible makes it more manageable, and makes it easier to recover when you change your mind. (I started my on-the-side home business, Wilson Mines Co., to make modules for this purpose.) Anyway, there's a lot of I/O bit sharing you can do on the I/O ICs.
I haven't done things like SATA, but my workbench computer exists for workbench I/O, not human I/O, and everything goes through three 65c22 VIAs (and three 65c51 ACIAs which get very little use). These are all on the main board. The things mentioned above go through the first VIA. In addition there are the
It does have a board-edge connector plus a mezzanine board, but the processor's own buses don't go to these! If I want to add USB or so many other things, they are available in SPI or other interfaces that can go through ports I already have.
SPI can be handled at high speeds through Daryl Rictor's 65SPI chip (a 65-family SPI I/O IC, not to be confused with 65SIB which is the super-flexible interface method). (Note: in 2018 the CPLD he was using to make version 1 of the 65SPI was discontinued, so he migrated the design to a newer one, the Atmel ATF1504, for version 2. He is not currently selling pre-programmed ones, but the source and Intel Hex object files are available at the link. I hope someone will take it up and supply finished parts.)
Bit-banging SPI is very easy, and although slower, is still plenty fast for most uses. For the things that need the very fastest access like maybe video, put it on the same board with the processor. SPI can be almost as fast (actually, the fastest SPI ICs I've seen will handle nearly 200MHz SPI clock rates), and I²C which is slower but nearly the least work to hook up is good for things that don't need as much speed or don't transfer much data, an example being a digital temperature sensor or real-time clock or keyboard scanner which isn't going to change readings thousands (let alone millions) of times per second. I have a pros-and-cons comparison of SPI versus I²C in this forum post, about 2/3 of the way down the post, at the bulleted list.
These serial parts make a project far more manageable, since there are so few connections to make. Otherwise you begin to realize you may not live long enough to carry out the project you had envisioned. (Been there, done that.) I am constantly encouraging people to take advantage of the thousands of synchronous-serial ICs on the market.
Now after all that, if you still want a parallel I/O expansion bus, there are additional guidelines in the first three paragraphs of
this forum post and the ones around it.
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last updated May 3, 2022