A pin marked "NC" in the data book means "no connection," so don't connect it.  It's not necessarily a "not-connected" pin.  A few ICs (and I don't know if that includes any 6502-family processors) have internal connections to NC pins but the pin is only used in part of the production testing.  The data sheets usually tell you.  To stay out of trouble, don't use an NC pin for things like a convenient "Y" connection in your wire-wrapping (unless you just cut the pin off the IC itself and only use the WW socket pin).

SYNC:  The "synchronize" output identifies those cycles in which the processor is fetching an op code.  It can be used with the "ready" (RDY) input to single-step the processor.  This will not be covered here, although there is the note about single-cycling the processor in the Clock Generation section.  If you don't want to further investigate this possibility through other sources, then leave this pin unconnected.

RDY:  The "ready" input is used for single-stepping, wait states for slow memory, and DMA.  Some makes of 65c02 have had internal weak pull-ups on RDY and other inputs, so you could get away without connecting it to anything.  WDC has apparently removed this.  Better not let it float.  Note that WDC's RDY is bidirectional, and it will be pulled low if it gets the WAI (wait-for-interrupt) instruction in your program.  (WAI puts the processor in a better position to make a fast-as-possible response to an imminent interrupt.)  On the other hand, although you may not have any plans to use WAI, a crash could make the processor misinterpret a $CB operand or data byte as the WAI op code and possibly damage the chip through heating problems if the output is shorted to +5V.  If you don't want to further investigate or use the features this pin is made for, and you want the circuit to be able to handle any manufacturer's 6502 or 65c02, pull it up to +5V through a 3.3K pull-up resistor.

Jeff Laughton has a wait-state circuit on the 6502.org forum using RDY for slow ROM.  He also has a very simple clock-stretching circuit to replace a RDY circuit, here.  A big advantage it has over other clock-stretching methods is that it does not affect VIA timing.

Sometimes it gets viewed as RDY (ready-not), but this is incorrect!  RDY would imply that you put it low when you're ready to have the processor move on.  It's not that way though.  You put it low when you're not ready yet and need for it to wait.  If the memory being accessed is fast enough to always be ready at the bus's clock speed, you keep RDY pulled up to mean "I'm ready and I don't need any more time to get the data out."  High means, "Yes!  Ready!  Go!"  Low means, "No, I'm not ready!  Don't go yet!"  It is active-high.

SO (or SOB):  None of my books' authors seem to know what this set-oVerflow-flag input was intended for, and they just opt to respect its obscurity and don't use it.  It is the most mysterious of all the mystery pins!  Just connect it to +5V.  It could be seen as a 1-bit input with the fastest possible test and branch, but you would have to make sure it never goes low when you need the V bit for its intended purpose of arithmetic operations and testing bits with the BIT instruction.  You will undoubtedly have other input hardware that's more functional anyway.  The Commodore 1541 floppy-disc drive (and relatives) used it, but it was an application that would not be needing it in math routines when the V bit could get set from the outside.

Φ1: (say "phase-one")  This output is commonly left unconnected.  For computers made to the scope of this primer, probably your only reason to use it would be for the RC clock shown in the earlier section Clock Generation.  It is sometimes said to be 180° out of phase with Φ2; but actually Φ2's rising and falling edges will trail Φ1's falling and rising edges (respectively) by a few nanoseconds.

MLB (or ML):  The memory-lock output is generally for multi-processor systems to keep non-optimal bus-arbitration timing from interfering with read-modify-write instructions like ASL, INC, etc..  If you don't want to further investigate this possibility through other sources, then leave this pin unconnected.  You'll only find this pin on WDC's 65c02's anyway, not on those of other manufacturers.

BE:  The bus-enable input allows external control of the buses.  If you don't want to further investigate this possibility through other sources, then pull this up to +5V through a 3.3K resistor.  You'll only find this pin on WDC's 65c02's anyway, not on those of other manufacturers.

VPB (or VP):  The vector-pull output indicates that a vector location is being addressed during an interrupt sequence.  It can be used to select and prioritize interrupts from several sources.  If you don't want to further investigate this possibility through other sources, then leave this pin unconnected.  You'll only find this pin on WDC's 65c02's anyway, not on those of other manufacturers.  Here's the minor conflict associated on the DIP (as opposed to the PLCC or QFP packages:  WDC put the VPB on pin 1 of the DIP, which is one of the two ground pins for other manufacturers.  If you want your board to be compatible with any brand of 6502/65c02, you might want to put a two-pin header to put a shorting block on to connect pin 1 to ground or not.  Unfortunately, such an arrangement will add a little more inductance to the ground connection.  There is another pin for ground (pin 21), but groundbounce and other potentially problematic behaviors on your board could be reduced with non-WDC parts if this pin were directly grounded.  If you want it simple, let me put it this way:  With WDC's 65c02, leave it unconnected.  With anyone else's, ground it.


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last updated Oct 13, 2021